1. Field
This invention relates generally to a stacked field effect transistor (FET) based radio-frequency (RF) amplifier circuit and, more particularly, to a stacked FET based RF amplifier circuit including an op-amp for each FET that corrects the gate bias for each FET in the stack using feedback from the source of that FET to correct the source voltage to a reference voltage level as provided by a voltage divider so as to provide the desired drain current and drain to source voltage to each FET to attain optimal performance.
2. Discussion
Amplifiers that employ one or more FET devices for amplifying RF signals are well known in the art. RF amplifiers of this type have many applications including, but not limited to, low noise amplifiers (LNA), intermediate frequency (IF) amplifiers, local oscillator (LO) amplifiers, etc. The particular RF signal being amplified is provided to the gate terminal of the FET device, where the amplified RF signal is output at the drain terminal of the device. These types of RF amplifiers often employ stacked FET devices, where the FET devices share the same drain-to-source current Ids and a source resistor to regulate the current.
In order to provide RF signal amplification, the FET device requires two DC bias voltages, where for a typical FET RF amplifier circuit, the DC bias voltages are independent of the RF signal, and where the bias voltages include a drain-to-source bias voltage Vds that allows charge flow through the device and a gate-to-source bias voltage Vgs that controls the width of the channel, where the gate-to-source bias voltage Vgs modulates the current flow through the channel. The gate-to-source bias voltage Vgs is controlled by applying a reference voltage potential to the gate terminal of the FET device. Further, the drain-to-source bias voltage Vds is controlled by providing a controlled drain-to-source current Ids, sometimes referred to herein as the drain current. Particularly, the goal of the FET drain current Ids is to define the drain-to-source potential Vds at a desired value. These bias voltages are optimized for a particular desired amplification, and performance. For example, for an LNA, the bias voltages would be selected to provide a low noise figure.
A number of techniques are known in the art to control the drain-to-source current Ids through the FET device in a RF amplifier circuit to control the desired drain-to-source bias voltage Vds. These techniques include FET circuits that provide dual-bias, self-bias, and current regulation through drain current feedback. However, these known techniques for controlling the bias of an FET device in a RF amplifier have heretofore been limited in their ability to overcome environmental factors, such as temperature variation and array gradients, device drift and manufacturing and process variations.